“存器”造句

该比较器包含一级预放大器 、 动态锁存器及时钟控制反相器.
The comparator includes a preamplifier, a dynamic latch and a clocked inverter.

具体电路由锁存器、选择器及分频器组成,以CMOS逻辑 和源极耦合逻辑 ( SCL ) 实现.
They are implemented with CMOS logic and source coupled logic ( SCL ).

然后装入暂存器并传输控制到选定的过程.
It then reload s register and transfers control to the selected process.

• #存器